Integration

Aims & Scope

Integration's aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies.

Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications.

The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.

View Aims & Scope

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Metrics & Ranking

Impact Factor

Year	Value
2025	2.5

SJR (SCImago Journal Rank)

Year	Value
2024	0.462

Quartile

Year	Value
2024	Q2

h-index

Year	Value
2024	50

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Abstracting & Indexing

Journal is indexed in leading academic databases, ensuring global visibility and accessibility of our peer-reviewed research.

• Scopus
• Google Scholar
• Web of Science

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Subjects & Keywords

Journal’s research areas, covering key disciplines and specialized sub-topics in Computer Science and Engineering, designed to support cutting-edge academic discovery.

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Most Cited Articles

The Most Cited Articles section features the journal's most impactful research, based on citation counts. These articles have been referenced frequently by other researchers, indicating their significant contribution to their respective fields.

• Recent directions in netlist partitioning: a survey

  Citation: 425

  Authors: Charles J, Andrew B

• HERMES: an infrastructure for low area overhead packet-switching networks on chip

  Citation: 360

  Authors: Fernando, Ney, Aline, Leandro, Luciano

• Scaling equations for the accurate prediction of CMOS device performance from 180 nm to 7 nm

  Citation: 326

  Authors: Aaron, Bevan

• Computer vision algorithms and hardware implementations: A survey

  Citation: 263

  Authors: Xin, Youni, Xuejiao, Ming, Xin

• Performance optimization of VLSI interconnect layout

  Citation: 245

  Authors: Jason, Lei, Cheng-Kok, Patrick H.

• Analog circuit optimization system based on hybrid evolutionary algorithms

  Citation: 153

  Authors: Bo, Yan, Zhiping, Leibo, Miao, Zheng, Jing, Francisco V.

• VLSI circuit reconstruction from mask topology

  Citation: 140

  Authors: N.P., J.T.

• Methods for evaluating and covering the design space during early design development

  Citation: 139

  Authors: M

• Power and electromagnetic analysis: Improved model, consequences and comparisons

  Citation: 134

  Authors: Eric, François-Xavier, Jean-Jacques

• Predictions of CMOS compatible on-chip optical interconnect

  Citation: 132

  Authors: Guoqing, Hui, Mikhail, Nicholas A., David H., Philippe M., Eby G.

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