IEEE Transactions on Semiconductor Manufacturing

Aims & Scope

The IEEE Transactions on Semiconductor Manufacturing addresses the challenging problems of manufacturing complex microelectronic components, especially very large scale integrated circuits (VLSI).

Manufacturing these products requires precision micropatterning, precise control of materials properties, ultraclean work environments, and complex interactions of chemical, physical, electrical and mechanical processes.

View Aims & Scope

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Metrics & Ranking

Impact Factor

Year	Value
2025	2.3
2024	2.30

Journal Rank

Year	Value
2024	8552

Journal Citation Indicator

Year	Value
2024	632

SJR (SCImago Journal Rank)

Year	Value
2024	0.670

Quartile

Year	Value
2024	Q2

h-index

Year	Value
2024	83

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Abstracting & Indexing

Journal is indexed in leading academic databases, ensuring global visibility and accessibility of our peer-reviewed research.

• Scopus
• Google Scholar
• Web of Science

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Subjects & Keywords

Journal’s research areas, covering key disciplines and specialized sub-topics in Engineering, Materials Science and Physics and Astronomy, designed to support cutting-edge academic discovery.

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Most Cited Articles

The Most Cited Articles section features the journal's most impactful research, based on citation counts. These articles have been referenced frequently by other researchers, indicating their significant contribution to their respective fields.

• Material removal mechanism in chemical mechanical polishing: theory and modeling

  Citation: 523

  Authors: D.A.

• Fifty Years of Moore's Law

  Citation: 494

  Authors: Chris A.

• Scheduling semiconductor wafer fabrication

  Citation: 485

  Authors: L.M.

• A Convolutional Neural Network for Fault Classification and Diagnosis in Semiconductor Manufacturing Processes

  Citation: 413

  Authors: Ki Bum, Sejune, Chang Ouk

• Fault Detection Using the k-Nearest Neighbor Rule for Semiconductor Manufacturing Processes

  Citation: 390

  Authors: Q. Peter, Jin

• Wafer Map Defect Pattern Classification and Image Retrieval Using Convolutional Neural Network

  Citation: 339

  Authors: Takeshi, Deepak V.

• Efficient scheduling policies to reduce mean and variance of cycle-time in semiconductor manufacturing plants

  Citation: 310

  Authors: S.C.H., D., P.R.

• VARIUS: A Model of Process Variation and Resulting Timing Errors for Microarchitects

  Citation: 289

  Authors: Smruti R., Brian, Radu, Jun, Abhishek, Josep

• Wafer Map Failure Pattern Recognition and Similarity Ranking for Large-Scale Data Sets

  Citation: 275

  Authors: Jyh-Shing R.

• The use and evaluation of yield models in integrated circuit manufacturing

  Citation: 273

  Authors: J.A.

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