Formal Methods in System Design

Aims & Scope

The focus of this journal is on formal methods for designing, implementing, and validating the correctness of hardware (VLSI) and software systems.

The stimulus for starting a journal with this goal came from both academia and industry.

In both areas, interest in the use of formal methods has increased rapidly during the past few years.

The enormous cost and time required to validate new designs has led to the realization that more powerful techniques must be developed.

A number of techniques and tools are currently being devised for improving the reliability, and robustness of complex hardware and software systems.

While the boundary between the (sub)components of a system that are cast in hardware, firmware, or software continues to blur, the relevant design disciplines and formal methods are maturing rapidly.

Consequently, an important (and useful) collection of commonly applicable formal methods are expected to emerge that will strongly influence future design environments and design methods.

View Aims & Scope

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Metrics & Ranking

Impact Factor

Year	Value
2024	0.70

Journal Rank

Year	Value
2024	15292

Journal Citation Indicator

Year	Value
2024	73

SJR (SCImago Journal Rank)

Year	Value
2024	0.345

Quartile

Year	Value
2024	Q3

h-index

Year	Value
2024	58

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Abstracting & Indexing

Journal is indexed in leading academic databases, ensuring global visibility and accessibility of our peer-reviewed research.

• Scopus
• Google Scholar
• Web of Science

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Subjects & Keywords

Journal’s research areas, covering key disciplines and specialized sub-topics in Computer Science and Mathematics, designed to support cutting-edge academic discovery.

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Most Cited Articles

The Most Cited Articles section features the journal's most impactful research, based on citation counts. These articles have been referenced frequently by other researchers, indicating their significant contribution to their respective fields.

• Bounded Model Checking Using Satisfiability Solving

  Citation: 454

  Authors: Edmund, Armin, Richard, Yunshan

• LSCs: Breathing Life into Message Sequence Charts

  Citation: 449

  Authors: Werner, David

• Model Checking of Safety Properties

  Citation: 411

  Authors: Orna, Moshe Y.

• Reactive Modules

  Citation: 337

  Authors: Rajeev, Thomas A.

• Memory-efficient algorithms for the verification of temporal properties

  Citation: 269

  Authors: C., M., P., M.

• Property preserving abstractions for the verification of concurrent systems

  Citation: 236

  Authors: C., S., J., A., S., David

• Symmetry and model checking

  Citation: 209

  Authors: E. Allen, A. Prasad

• Exploiting symmetry in temporal logic model checking

  Citation: 203

  Authors: E. M., R., T., S.

• Formal verification by symbolic evaluation of partially-ordered trajectories

  Citation: 199

  Authors: Carl-Johan H., Randal E.

• Verification of Real-Time Systems using Linear Relation Analysis

  Citation: 199

  Authors: Nicolas, Yann-Erick, Patrick

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